View EMIF09-02726SX_355670.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
EMIF09-02726SX
EMI FILTER INCLUDING ESD PROTECTION
Application Specific Discretes A.S.D.TM
MAIN APPLICATIONS Where EMI filtering in ESD sensitive equipment is required : Computers and printers Communication systems Mobile phones MCU Boards
SO-20 DESCRIPTION The EMIF09-02726SX is a highly integrated array designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS Cost-effectiveness compared to discrete solution EMI bi-directional low-pass filter High efficiency in ESD suppression. High reliability offered by monolithic integration COMPLIESWITH THE FOLLOWING STANDARD:
I
SSOP20 PIN-OUT CONFIGURATION
I1 I2 I3 I4 I5 GND I6 I7 I8 I9 O1 O2 O3
9 C E L L S
O4 O5 GND O6 O7 O8 O9
IEC 1000-4-2
15kV 8 kV
(air discharge) (contact discharge)
O
D D
RI/O = 27 , tolerance +/-20% EMIF09-02726SXfiltering response curves CIN = 130pF Typical response to IEC1000-4-2 (16 kV air discharge)
ASD is a trademark of STMicroelectronics
August 1999 - Ed: 2
1/12
EMIF09-02726SX
ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP Parameter Maximum electrostatic discharge in following measurement conditions: MIL STD 883C - METHOD 3015-6 IEC1000-4-2 - air discharge IEC1000-4-2 - contact discharge Peak pulse power (8/20s) Storage temperature range Junction temperature Operating temperature range Value Unit
25 16 9 200 - 55 to + 150 150 - 40 to + 85
kV
PPP Tstg Tj TOP
W C C C
Symbol VRM VBR VCL VF CIN Rd IRM IPP
Parameter Stand-offvoltage Breakdown voltage Clamping voltage Forward voltage drop Input capacitance per line Dynamic impedance Leakage current Peak pulse current
Slope = 1 / Rd
I
IF VBR VF VCL VRM IRM
V
IPP
Symbol IRM VBR VF Rd C
Test conditions VRM = 5.25 V, between any I/O pin and GND IR = 1 mA, between any I/O pin and GND IF = 200 mA, between any I/O pin and GND IPP = 15 A, t p = 2.5s (note 2) 0V bias VRMS = 30mV F = 1MHz (note 3)
Min. 6.1
Typ.
Max. 20 7.2 1.25
Unit A V V pF
0.3 130
Note 1: VCL corresponds to the voltage level seen at the output pin Note 2: Rd is given per diode Note 3: C is given per diode
2/12
EMIF09-02726SX
Fig. 1: Peak power dissipation versus initial junction temperature.
Ppp[Tj initial]/Ppp[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0
2000 1000
Fig. 2: Peak pulse power versus exponentialpulse duration (Tj initial=25C).
Ppp(W)
100
Tj initial(C)
tp(s) 10
0
25
50
75
100
125
150
1
10
100
Fig. 3: Clamping voltage versus peak pulse current (Tj initial=25C). Rectangular waveform: tp = 2.5s
30.0 10.0 Ipp(A)
tp=2.5s
Output Vcl Input Vcl
Fig. 4: Input capacitance versus reverse applied voltage (typical values).
C(pF) 220 200 180 160
F=1MHz Vosc=30mV
1.0
140 120 VR(V) 1 2 5 10
Vcl(V) 0.1 5 6 7 8 9 10 11 12 13 14 15
100
Fig. 5: Relative variation of leakagecurrent versus junction temperature (typical values).
Fig. 6: Peak forward voltage drop versus peak forward current (typical values). Rectangular waveform: tp = 2.5s
IFM(A)
IR[Tj] / IR[Tj=25C] 3.0 2.5 1.00 2.0 1.5 1.0 0.5 0.0 25 50 75 Tj(C) 100 125 150 0.10 5.00
VFM(V) 0.01 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
3/12
EMIF09-02726SX
ESD protection by the EMIF09-02726SX Electrostatic discharge (ESD) is a major cause of failure in electronic systems. Transient Voltage Suppressors are an ideal choice for ESD protection. They are capable of clamping the incoming transient to a low enough level such that damage to the protected semiconductor is prevented. Surface mount TVS arrays offer the best choice for minimal lead inductance. They serve as parallel protection elements, connected between the signal line to ground. As the transient rises above the operatingvoltage of the device, the TVS array becomes a low impedancepath diverting the transient current to ground. Fig. 7: Example of connectionfor one cell of the EMIF09-02726SX
I1 I2 I3 I4 I5 GND I6 I7 O1 O2 O3 O4 O5 GND O6 O7 EMIF09-02726SX O8 O9
Logic Transceiver
I8 I9
1284-A Connector
The EMIF09-02726SX array is the ideal board level protection of ESD sensitive semiconductor components. It provides best efficiency when using separated inputs and outputs, in the so called 4-points structure. Circuit Board Layout Circuit board layout is a critical design step in the suppression of ESD induced transients. The following guidelines are recommended : The EMIF09-02726SX should be placed as near as possible to the input terminals or connectors. The path length between the ESD suppressor and the protectedline should be minimized. All conductive loops, including power and ground loops should be minimized. The ESD transient return path to ground should be kept as short as possible. Ground planes should be used whenever possible. Fig. 8: Recommended PCB layout to benefit from 4-point structure
TO DO
I1 I2 I3 I4 I5 GND I6 O1 I2 O2 I3 O3 I4 O4 I5 O5 GND GND I6 O6 O7 O8 O9 O6 O7 O8 O9 GND O5 O4 O3 O2
NOT TO DO
I1 O1
Logic Transceiv er, ASIC,...
I7 I8 I9
Logic Transceiv er, ASIC,...
I7 I8 I9
EMIF09-02726SX footprint
4/12
EMIF09-02726SX footprint
EMIF09-02726SX
TECHNICAL INFORMATION ESD PROTECTION The EMIF09-02726SX is particularly optimized to perform high level ESD protection. The clamping voltage is given by the formula: VCL = Vbr + Rd.IPP The protection function is splitted in 2 stages. As shown in figure A1, the ESD strike is clamped by the first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output voltage very low at the Vout level. Fig. A1: ESD clamping behavior
Rg Rd Vg Vin Vbr S1 Vbr S2 Device to be protected
R Rd Vout Rload
ESD Surge
EMIF09-02726SX
To determine the remaining voltages at both Vin and Vout stages, we give the typical dynamic resistance value Rd. Considering that : R>>Rd, Rg>>Rd and Rload>>Rd, the voltages are given by the following formulas: Rg.Vbr + Rd.Vg Vin = Rg
Vout =
R.Vbr + Rd.Vin R
The result of the calculation made for VG= 8kV, Rg= 330 (IEC1000-4-2 standard), Vbr=6.6V, Rd=0.3 and R=27 is: Vin = 13.87V Vout = 6.75 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at the Vin side. This parasitic effect is not present at the Vout side because the current involved after the resistance R is low.
5/12
EMIF09-02726SX
LATCH-UP PHENOMENA The early aging and destruction of IC's is often due to latch-up phenome na which is principally induced by dV/dt. Thanks to its RC structure, the EMIF09-02726SX provides a high immunity to latch-up by integration of fast edges. (See the response of EMIF09-02726SX to a 1ns edge on Fig. A3) The measurements performed as described below show very clearly the high efficiency of the ESD protection: - no influence of the parasitic inductances on Vout stage - Vout clamping voltage very close to Vbr Fig. A2: Measurement conditions
ESD SURGE
EMIF09-02726SX R
Vin
Vout
GND
GND
Fig. A3: Remaining voltage at both stages S1 (Vin) and S2 (Vout) during ESD surge a) Positive surge b) Negative surge
It should be noted that the EMIF09-02726SXis not only active for positive ESD surges but also for negative ones. For this kind of disturbance,it clamps close to ground voltage as shown in Fig. A3b. NOTE: DYNAMIC RESISTANCE MEASUREMENT Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. Figure A4 illustrates the current waveform used to measure the Rd. Fig. A4: Rd measurement current wave As the value of the dynamic resistance remains I stable for a surge duration lower than 20s, the 2.5s rectangular surge is well adapted. In additionboth rise and fall times are optimized to IPP avoid any parasitic phenomenon during the measurement of Rd.
t 2 s 2.5 s 2.5s durationmeasurement wave
6/12
EMIF09-02726SX
FREQUENCY BEHAVIOR In addition to the ESD protection, the EMIF09-02726SX offers an EMI / RFI filtering function thanks to its Pi-filter structure. This low-pass filter is characterized by the following parameters: - Cut-off frequency - Insertion loss - High frequency rejection 20MHz -3dBm >-18dBm
Fig. A5: EMIF09-02726SXfiltering response curves
Figure A5 gives these parameters, in particular the signal rejection at the 900MHz GSM frequency is measured at about -21dBm (SO-20) and -26dBm (SSOP20), while the attenuation for FM broadcastrange (around 100MHz) is better than -17dBm for both SO-20 and SSOP20. Fig. A6: Measurement conditions
TRACKING GENERATOR
TG OUTPUT RF INPUT
SPECTRUM ANALYSER
50
EMIF09 -02726Sx
Vg 50 Vin Vout
TEST BOARD
1 20
EMIF0902726Sx
7/12
EMIF09-02726SX
CROSSTALK BEHAVIOR 1- Crosstalk phenomena Fig. A7: Crosstalk phenomena
RG1 line 1 1 VG1 + 12 VG2
VG1 RG2 line 2
RL1
VG2
RL2
2VG2 + 21 VG1
DRIVERS
RECEIVERS
The crosstalk phenomena are due to the coupling between 2 lines. The coupling factor ( 12 or 21 ) increases when the gap across lines decreases, particularly in silicon dice. In the example above the expected signal on load RL2 is 2VG2, in fact the real voltage at this point has got an extra value 21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few k). The following chapters give the value of both digital and analog crosstalk. 2- Digital Crosstalk Fig. A8: Digital crosstalk measurements
+5V 74HC04 Line 1 +5V VG1 Line 2 21 VG1 EMIF09-02726SX +5V 74HC04
Square Pulse Generator 5KHz
Figure A8 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. Figure A9 shows that in the case of a signal from 0 to 5V with a rise time of a few tenths of ns, the impact on the disturbed line is less than 100mV peak to peak. No data disturbance is noted on the concerned line. The same results are obtained with falling edges. Note: The measurements have been performed in the worst case i.e. on two adjacent cells (1/20 & 2/19).
8/12
EMIF09-02726SX
Fig. A9: Digital crosstalk results
3- Analog Crosstalk
Fig. A10: Analog crosstalk measurements
Fig. A11: Typical analog crosstalk results
TG OUTPUT
RF INPUT
TEST BOARD
1 19
EMIF0902726Sx
Figure A10 gives the measurement circuit for the analog application. In figure A11, the curves show the effect of cell 1/20 on cell 2/19,no differenceis found with other couples of adjacentcells. In usual frequency range of analog signals (up to 100MHz) the effect on disturbedline is less than -32 dBm for SO-20 package and -37dBm for SSOP20package.
9/12
EMIF09-02726SX
4- PSpice model Fig. A12: PSpicemodelof oneEMIF09-02726SXcell
5nH IN
27
5nH OUT
Dz Dr
Df
Dz Dr
Df
Lg
GND
Figure A12 shows the PSpice model of one cell of the EMIF09-02726SX. In this model, the diodes are defined by the following PSpice parameters : BV Cjo IBV IKF IS ISR N M RS VJ TT Dz 5.6 130p 1m 1000 10E-21 1p 1 0.3333 0.3 0.6 1u Df 1000 130p 100u 0 2.0861E-21 1n 1 0.3333 0.3 0.6 1u Dr 1000 1p 100u 1000 10E-15 100p 0.6 0.3333 1m 0.6 1n
Note: This simulation model is given for an ambient temperature of 27C.
The value of Lg is depending on the package: SSOP20 --> Lg=0.7nH SO-20 --> Lg=1.4nH The comparison between the PSpice simulation and the measured frequency response is given in fig A13a & A13b. This shows that the PSpice model is very close to the product behavior. Fig. A13: Comparison between PSpice simulation and measured frequency response a) SSOP20Package
5nH IN
b) SO-20 Package
5nH OUT
27
Dz Dr
Df
Dz Dr
Df
Lg
GND
10/12
EMIF09-02726SX
PART NUMBERING AND ORDERING INFORMATION
EMIF
09
-
027
26
S
3
EMI FIL TERING 9 Bits Wide
R value ()
Surface mount Package: 3: SO-20 6: SSOP20
C/10 2 x 130pF = 260pF
PACKAGE MECHANICAL DATA SO-20 (Plastic) DIMENSIONS REF.
D hx45
Millimeters
Inches
Min. Typ. Max. Min. Typ. Max. A 2.35 0.10 0.33 0.23 12.6 7.40 1.27 10.0 0.25 0.50 10.65 0.394 0.75 0.010 1.27 0.020 8 (max) 2.65 0.092 0.20 0.004 0.51 0.013 0.32 0.009 13.0 0.484 7.60 0.291 0.050 0.419 0.029 0.050 0.104 0.008 0.020 0.013 0.512 0.299
A B e A1
K L
C
A1 B C D E
E
H
e H h L K
11/12
EMIF09-02726SX
PACKAGE MECHANICAL DATA SSOP20 (Plastic) DIMENSIONS REF.
L
Millimeters Min. Typ. Max. Min. 2.00 0.25 1.51 0.25 0.10 7.05 7.60 5.02 6.10 0.65 0 0.25 0.50 10 0 0.30 2.00 0.059
Inches Typ. Max. 0.079 0.010 0.079
A
A2 A
b D e k
A1
A1
E
c
A2 b c
0.35 0.010 0.012 0.014 0.35 0.004 8.05 0.278 8.70 0.299 0.014 0.317 0.343
20
11
D
E1
E E1 e k L
1
10
6.22 0.198 0.240 0.245 0.026 10
0.80 0.010 0.020 0.031
ORDERING CODE Order code EMIF09-02726S3 EMIF09-02726S6 Marking ESDR6V1-27 ESDR6V1-27 Package SO-20 SSOP20 Weight 0.52 g. 0.18 g. Delivery mode Tube Tube Base qty (pcs) 50 50
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringementof patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
http://www.st.com
12/12

▲Up To Search▲

Price & Availability of EMIF09-02726SX

	To Download EMIF09-02726SX Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .